In a capacitively-coupled plasma processing apparatus, for example, a parallel plate type plasma processing apparatus, plasma is generated between an upper electrode and a lower electrode within a processing chamber. However, the distribution of the generated plasma becomes non-uniform according to, electrical properties of a semiconductor wafer (hereinafter, simply referred to as a “wafer”) disposed between the plasma and the lower electrode and components disposed within the processing chamber, or processing conditions such as the kind of a processing gas introduced into the processing chamber, and the pressure and temperature within the processing chamber. Especially, the plasma density increases in the vicinity of the center of the upper electrode.
The plasma density depends on the electric field within the processing chamber. Thus, the assignee suggested, in Japanese Laid-Open Patent Publication No. 2004-193565, a technology of dividing the upper electrode facing the space within the processing chamber into an inner electrode and an annular outer electrode surrounding the inner electrode, and setting the value of a high frequency power to be applied to the outer electrode to be larger than the value of a high frequency power to be applied to the inner electrode so as to partially control an electric field within the processing chamber. Also, in order to achieve the same object, U.S. Pat. No. 8,012,306 discloses a technology of dividing the lower electrode into an inner electrode and an annular outer electrode surrounding the inner electrode, and setting high frequency powers to be applied to the inner electrode and the outer electrode to have different values.